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   22 #ifndef __POK_SPARC_SPACE_H__ 
   23 #define __POK_SPARC_SPACE_H__ 
   32 #define MM_ET_INVALID 0x0  
   42 #define MM_ACC_R      (0x0 << 2)  
   43 #define MM_ACC_RW     (0x1 << 2)  
   44 #define MM_ACC_RE     (0x2 << 2)  
   45 #define MM_ACC_RWE    (0x3 << 2)  
   46 #define MM_ACC_E      (0x4 << 2)  
   47 #define MM_ACC_R_S_RW (0x5 << 2)  
   49 #define MM_ACC_S_RE   (0x6 << 2)  
   50 #define MM_ACC_S_RWE  (0x7 << 2)  
   58 #define MM_CACHEABLE  (1 << 7) 
   59 #define MM_MODIFIED   (1 << 6) 
   60 #define MM_REFERENCED (1 << 5) 
   67 #define MM_LVL1_ENTRIES_NBR 256   
   68 #define MM_LVL1_PAGE_SIZE (64 * 64 * 4 * 1024)  
   73 #define mm_index1(addr) (((addr) >> 24) & 0xFF) 
   75 #define MM_LVL2_ENTRIES_NBR 64   
   76 #define MM_LVL2_PAGE_SIZE (64 * 4 * 1024)  
   81 #define mm_index2(addr) (((addr) >> 18) & 0x3F) 
   83 #define MM_LVL3_ENTRIES_NBR 64  
   84 #define MM_LVL3_PAGE_SIZE (4 * 1024)  
   89 #define mm_index3(addr) (((addr) >> 12) & 0x3F) 
   97 #define ASI_M_MMUREGS    0x19  
   98 #define MMU_CTRL_REG     0x00000000 
   99 #define MMU_CTXTBL_PTR   0x00000100 
  100 #define MMU_CTX_REG      0x00000200 
  101 #define MMU_FAULT_STATUS 0x00000300 
  102 #define MMU_FAULT_ADDR   0x00000400 
  105 #define LEON_CTX_NBR 256  
  107 typedef uint32_t pte;